The present invention relates to an automatic error detection and correction system suited for differential phase-shift-keying (DPSK) data transmission systems.
To adapt an error correction system to a DPSK system, the structure illustrated in FIG. 1 is conventionally employed. In FIG. 1, after check digits have been added at an error correcting encoder 1 to data to be transmitted, the data are differentially encoded in a differential encoder 3 included in a modulator unit 2 so that they are modulated onto a carrier wave at a modulator 4 and then transmitted to a transmission (or storage) medium 5. The data received through the transmission medium 5 are demodulated first by a demodulator 7 in a demodulator unit 6. After the data have been differentially decoded in a differential decoder 8 of the modulator unit 6, the errors introduced during the transmission are corrected in an error correcting decoder 9 to restore correct transmission data. However, if one digit error (corresponding to one phase-encoded data) is introduced in the transmission medium 5, the error is expanded in the differential decoder 8 with the result that errors of two successive phase-encoded data are given to the error correcting decoder 9.
The structure of FIG. 1 therefore requires an encoder and a decoder capable of correcting more errors than those introduced during the transmission through the transmission medium 5, and unavoidably complicates the encoder and decoder.
For details of such a prior art shown in FIG. 1, reference is made to FIG. 5 of the article by G. David Forney, Jr., and Edward K. Bower, entitled "A High-Speed Sequential Decoder: Prototype Design and Test," IEEE Transactions on Communication Technology, Vol. COM-19, No. 5, October issue, 1971, pp. 821-824.
To avoid such a disadvantage, a modified structure illustrated in FIG. 6(b) of the Forney, Jr. et al. article has been proposed. Such structure is shown schematically in FIG. 2 of the accompanying drawings. The error correcting encoder 1 and the differential encoder 3 are interchanged in sequence and the error correcting decoder 9 and the differential decoder 8 are also interchanged so that the error correcting and decoding can be carried out so that the errors introduced in the transmission medium 5 are not expanded. However, in this modified structure, the error correction must be performed before carrying out the differential decoding. The error correction therefore must be carried out under such state that there is no coincidence in phase references between the transmitter and the receiver.
To solve this problem, another structure effectively adaptable to a quadri-phase-shift-keying (QPSK) system has been proposed in FIG. 7(a) of the Forney, Jr. et al. article. Its simplified structure is shown in FIG. 3 of the attached drawings. The feature of the structure lies in employing two binary error correcting codes, independently. In more detail, one phase (-encoded) data is represented by 2 bits as shown by the two input and output lines. Like reference numerals denote like structural elements in FIG. 1.
However, either structure of FIG. 2 or FIG. 3 cannot be adopted if the error correcting encoder 1 and the modulator unit 2, and the error correcting decoder 9 and the demodulator unit 6 are not formed in the same structural units, respectively. Even if they are formed in the same structural units, said units 2 and 6 of FIG. 1 need to be modified to the structure of FIG. 2 or FIG. 3. This prevents various problems in design changes, which seems to be impossible as a practical matter.